Vertically integrated double-layer on-chip silicon membranes for 1-to-12 waveguide fanouts
- 30 April 2012
- journal article
- research article
- Published by AIP Publishing in Applied Physics Letters
- Vol. 100 (18), 181102
- https://doi.org/10.1063/1.4709489
Abstract
We present an on-chip vertically integrated three-dimensional photonic integrated circuit. Double-layer 1 × 12 multimode interference (MMI) couplers are fabricated on silicon membranes using double-bonded silicon-on-insulator wafers. The input light is transverse electric polarized, operating at 1550 nm. The top layer MMI coupler has an excess loss of 0.48 dB and an uniformity within 1.1 dB. The bottom layer MMI coupler has an excess loss of 2.9 dB and an uniformity within 1.7 dB.Keywords
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