CMOS integration issues with high-k gate stack
- 26 October 2004
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- MOS characteristics of ultrathin CVD HfAlO gate dielectricsIEEE Electron Device Letters, 2003
- Charge trapping and dielectric reliability of SiO/sub 2/-Al/sub 2/O/sub 3/ gate stacks with TiN electrodesIEEE Transactions on Electron Devices, 2003
- Dual work function metal gate CMOS technology using metal interdiffusionIEEE Electron Device Letters, 2001