Robust superconducting die attach process

Abstract

As complexity of superconducting digital systems increase, the need for multi-chip modules and a reliable, high bandwidth attachment scheme for superconducting die becomes more and more critical. We have developed a flip chip die attach process for Low Temperature Superconducting (LTS) chips using InSn reflow soldering. Using standard reflow techniques, we create highly reproducible, uniform 14 micron-high solder bumps on gold-defined pad regions. Subsequent alignment, compression, and reflow soldering produce reliable, low inductance connections with high yield. The short interconnect distance of 5-7 /spl mu/m results in low enough inductance to support multi-GHz chip interconnect at low impedance. We have successfully tested and thermally cycled flip chipped die over many temperature cycles to liquid helium temperatures with no failures. We will report on successful attachment, testing, and rework of superconducting circuit chips. Specifically, we present data on solder bump uniformity, yield, electrical and thermal characteristics, reworkability, and reliability under repeated thermal cycling.