Fabrication of Self-Aligned Surface Tunnel Transistors with a 80-nm Gate Length

Abstract

A novel method using electron-beam (EB) lithography and regrowth for fabricating self-aligned InGaAs-based surface tunnel transistors (STTs) with sub-micron gate lengths has been developed. The shape of regrowth layer on the gate region is significantly affected not only by the gate lengths but also by the thickness of the regrowth layer. During regrowth, (111) facets are formed at the edges of the gate region while the (100) surface is maintained at the center. The shape changes to triangular consisting of (111) facets as gate length decreases below 150 nm due to the slow growth rate of the (111) facets compared to the (100) surface. The 80-nm STTs were fabricated by controlling the shape of the regrowth layer, and no deposition of the regrowth layer on the sidewall, which causes leakage current, occurred. The successful operation of InGaAs-based 80-nm STTs with clear negative differential resistance (NDR) characteristics and a gate-controlled peak current was obtained at room temperature.