At-speed delay characterization for IC authentication and Trojan Horse detection
- 1 June 2008
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
New attacker scenarios involving integrated circuits (ICs) are emerging that pose a tremendous threat to national security. Concerns about overseas fabrication facilities and the protection of deployed ICs have given rise to methods for IC authentication (ensuring that an IC being used in a system has not been altered, replaced, or spoofed) and hardware Trojan Horse (HTH) detection (ensuring that an IC fabricated in a nonsecure facility contains the desired functionality and nothing more), but significant additional work is required to quell these treats. This paper discusses how a technique for precisely measuring the combinational delay of an arbitrarily large number of register-to-register paths internal to the functional portion of the IC can be used to provide the desired authentication and design alteration (including HTH implantation) detection. This low-cost delay measurement technique does not affect the main IC functionality and can be performed at-speed at both test-time and run-time.Keywords
This publication has 8 references indexed in Scilit:
- Towards Trojan-Free Trusted ICs: Problem Analysis and Detection SchemePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2008
- Negative-skewed shadow registers for at-speed delay variation characterizationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2007
- Trojan Detection using IC FingerprintingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2007
- Monitoring temperature in FPGA based SoCsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2006
- Razor: circuit-level correction of timing errors for low-power operationIEEE Micro, 2004
- Silicon physical random functionsPublished by Association for Computing Machinery (ACM) ,2002
- A digitally adjustable resistor for path delay characterization in high-frequency microprocessorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Thermal testing on reconfigurable computersIEEE Design & Test of Computers, 2000