A 1.2-V 10-$\mu$W NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2 $^{\circ}$C (3$\sigma$) From $-$70 $^{\circ}$C to 125 $^{\circ}$C
- 11 October 2010
- journal article
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 45 (12), 2591-2601
- https://doi.org/10.1109/jssc.2010.2076610
Abstract
An NPN-based temperature sensor with digital output has been realized in a 65-nm CMOS process. It achieves a batch-calibrated inaccuracy of (3σ ) and a trimmed inaccuracy of (3σ) over the temperature range from to 125 . This performance is obtained by the use of NPN transistors as sensing elements, the use of dynamic techniques, i.e., correlated double sampling and dynamic element matching, and a single room-temperature trim. The sensor draws 8.3 from a 1.2-V supply and occupies an area of 0.1 mm2Keywords
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