Stress Distribution Analysis in Structured GaAs Layers Fabricated on Si Substrates

Abstract
The thermal stress in GaAs on Si produced by the thermal expansion coefficient mismatch is analyzed by the finite element method. It is shown that the stress is released near wafer edge or in the mesa-etched stripe whose width is the same order or narrower than the GaAs thickness. The calculated results are compared with the published data to show the validity of the analysis. The new structure to lower the stress is proposed and analyzed. More than one order of magnitude reduction can be obtained by partially separating the GaAs layer from the substrate.