Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network

Abstract

The shuffle-exchange network is considered as an interconnection network between processors and memory modules in an array computer. Lawrie showed that this network can be used to perform some important permutations in log2 N steps. This work is extended and a network is proposed that permits the realization of any permutation in 0([mi][/mi]N) shuffle-exchange steps. Additional modifications to the basic. procedure are presented that can be applied to perform efficiently some permutations that were not realizable with the original mechanism. Finally, an efficient procedure is described for the realization of a shuffle permutation of N elements on an array computer with M memory modules where M < N.