Analyzing the performance of a configurable ROPUF design controlled by programmable XOR gates
- 1 August 2015
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)
Abstract
Physical unclonable functions (PUFs), are physical entities that are embodied in a silicon chips and can be easily evaluated but they are difficult to predict. Ring Oscillators (ROPUFs) are appropriate security techniques for FPGA-based systems. This paper presents a Configurable design of ROPUF controlled with programmable XOR (PXORs) gates for area efficiency and stronger secret key production. PXORs gates are integrated in our design in order to control the frequencies of the Ring Oscillators. The proposed design is mapped on the entire area of five Xilinx Spartan-3E FPGAs, and takes advantage of the dedicated logic in the Configurable Logic Blocks (CLBs) to create multiple ROs. The Experimental results show that the design presented exhibits high performance in terms of average RO frequencies, average RO standard deviation, and a static variation ratio which is considerably higher than the dynamic variation. In addition, an efficient algorithm to reduce systematic variations and improve ROPUF uniqueness is presented.Keywords
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