High-Performance SIFT Hardware Accelerator for Real-Time Image Feature Extraction
- 22 July 2011
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems for Video Technology
- Vol. 22 (3), 340-351
- https://doi.org/10.1109/tcsvt.2011.2162760
Abstract
Feature extraction is an essential part in applications that require computer vision to recognize objects in an image processed. To extract the features robustly, feature extraction algorithms are often very demanding in computation so that the performance achieved by pure software is far from real-time. Among those feature extraction algorithms, scale-invariant feature transform (SIFT) has gained a lot of popularity recently. In this paper, we propose an all-hardware SIFT accelerator-the fastest of its kind to our knowledge. It consists of two interactive hardware components, one for key point identification, and the other for feature descriptor generation. We successfully developed a segment buffer scheme that could not only feed data to the computing modules in a data-streaming manner, but also reduce about 50% memory requirement than a previous work. With a parallel architecture incorporating a three-stage pipeline, the processing time of the key point identification is only 3.4 ms for one video graphics array (VGA) image. Taking also into account the feature descriptor generation part, the overall SIFT processing time for a VGA image can be kept within 33 ms (to support real-time operation) when the number of feature points to be extracted is fewer than 890.Keywords
This publication has 17 references indexed in Scilit:
- 81.6 GOPS Object Recognition Processor Based on a Memory-Centric NoCIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2009
- A FPGA-Based Dual-Pixel Processing Pipelined Hardware Accelerator for Feature Point Detection Part in SIFTPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2009
- A Parallel Hardware Architecture for Scale and Rotation Invariant Feature DetectionIEEE Transactions on Circuits and Systems for Video Technology, 2008
- SoPC Architecture for a Key Point DetectorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2007
- Real-time eye blink detection with GPU-based SIFT trackingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2007
- Hardware/Software co-design of a key point detector on FPGAPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2007
- Online stereo calibration using FPGAsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Distinctive Image Features from Scale-Invariant KeypointsInternational Journal of Computer Vision, 2004
- Recognising panoramasPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A Combined Corner and Edge DetectorPublished by British Machine Vision Association and Society for Pattern Recognition ,1988