Magnetic Random Accessible Memory Based Magnetic Content Addressable Memory Cell Design
- 20 May 2010
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Magnetics
- Vol. 46 (6), 1967-1970
- https://doi.org/10.1109/tmag.2010.2044981
Abstract
In this paper, we present a novel magnetic content addressable memory (MCAM) cell architecture. The proposed MCAM cell consists of four magnetic tunneling junction devices (MTJs). All previously proposed MCAM cell designs require both magnets of MTJ to be programmable. Such requirement poses a great challenge on device fabrication. This paper describe a new design based on conventional MTJs used in magnetic random accessible memory, i.e., only the top magnet is programmable while the bottom magnet is pinned. The feasibility of this design comes from the circuit connections based on the unique operation features of content addressable memory and the MTJs. The feasibility of the proposed operation has been demonstrated by numerical simulation.Keywords
This publication has 8 references indexed in Scilit:
- A Magnetic Content Addressable Memory Design With a Single Set of Programming WiresIEEE Transactions on Magnetics, 2009
- Spin torque based magnetic content addressable memoryJournal of Applied Physics, 2009
- A Planar Magnetic Content Addressable Memory CellIEEE Transactions on Magnetics, 2008
- Magnetic Content Addressable MemoryIEEE Transactions on Magnetics, 2007
- EaseCAM: An Energy and Storage Efficient TCAM-Based Router Architecture for IP LookupIEEE Transactions on Computers, 2005
- A CAM with mixed serial-parallel comparison for use in low energy cachesIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2004
- A novel low-voltage content-addressable-memory (CAM) cell with a fast tag-compare capability using partially depleted (PD) SOI CMOS dynamic-threshold (DTMOS) techniquesIEEE Journal of Solid-State Circuits, 2001
- A fully parallel 1-Mb CAM LSI for real-time pixel-parallel image processingIEEE Journal of Solid-State Circuits, 2000