Reducing off-chip memory traffic by selective cache management scheme in GPGPUs
- 3 March 2012
- conference paper
- conference paper
- Published by Association for Computing Machinery (ACM) in Proceedings of the 5th Annual Workshop on General Purpose Processing with Graphics Processing Units - GPGPU-5
- p. 110-119
- https://doi.org/10.1145/2159430.2159443
Abstract
No abstract availableKeywords
Funding Information
- National Research Foundation of Korea (2011-0027502)
- National IT Industry Promotion Agency (NIPA-2011-C1810-1102-0018)
- Microsoft Research (NIPA-2011-C1810-1102-0018)
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