An early performance analysis of POWER7-IH HPC systems

Abstract
In this work we present a performance evaluation of the POWER7-IH processor and of integrated systems built from it. We describe the architecture of P7-IH with an emphasis on those characteristics that have a direct impact on the performance for large-scale HPC systems and applications. An important area of emphasis is the memory and communication subsystems and their impact on achievable application performance. The results from a set of micro-benchmarks are presented that include memory, communication and OS-noise characteristics. In addition the results from several production level applications are analyzed and their performance linked to the results of the micro-benchmarks through the use of accurate performance models. The models will also be employed in exploring the achievable performance of these applications on much larger systems.
Funding Information
  • U.S. Department of Energy (DE-AC05-76RL01830)
  • Office of Cyberinfrastructure (OCI 07-25070)
  • Defense Advanced Research Projects Agency (HR0011-07-9-0002)

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