Positive sequence tracking Phase Locked Loops: A unified graphical explanation
- 1 June 2010
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1273-1280
- https://doi.org/10.1109/ipec.2010.5543480
Abstract
This paper presents a graphical analysis which explains several three-phase Phase-Locked Loop (PLL) algorithms based on the detection of the positive-sequence component of the power system. It is shown that, by employing vector algebra (dot, inner or scalar product) and space vectors concepts, several PLLs methods presented in literature may be represented by a unique theory.Keywords
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