High room temperature peak-to-valley current ratio in Si based Esaki diodes
- 1 January 1999
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 35 (13), 1111-1112
- https://doi.org/10.1049/el:19990728
Abstract
Room temperature (RT) I–V characteristics of epitaxially grown Si/SiGe/Si p+/i/n+ Esaki diodes are presented. The incorporation of Ge within the intrinsic (i) zone gives rise to an increased peak current density (jP = 3 kA/cm2) and peak-to-valley current ratio (PVCR) compared to pure Si structures (jP = 80 A/cm2). A detailed investigation and optimisation of post-growth annealing has demonstrated a record PVCR of 4.2 for Si based Esaki diodes.Keywords
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