Characterizing data analysis workloads in data centers
- 1 September 2013
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
As the amount of data explodes rapidly, more and more corporations are using data centers to make effective decisions and gain a competitive edge. Data analysis applications play a significant role in data centers, and hence it has became increasingly important to understand their behaviors in order to further improve the performance of data center computer systems. In this paper, after investigating three most important application domains in terms of page views and daily visitors, we choose eleven representative data analysis workloads and characterize their micro-architectural characteristics by using hardware performance counters, in order to understand the impacts and implications of data analysis workloads on the systems equipped with modern superscalar out-of-order processors. Our study on the workloads reveals that data analysis applications share many inherent characteristics, which place them in a different class from desktop (SPEC CPU2006), HPC (HPCC), and service workloads, including traditional server workloads (SPECweb200S) and scale-out service workloads (four among six benchmarks in CloudSuite), and accordingly we give several recommendations for architecture and system optimizations. On the basis of our workload characterization work, we released a benchmark suite named DCBench for typical datacenter workloads, including data analysis and service workloads, with an open-source license on our project home page on http://prof.ict.ac.cnIDCBench. We hope that DCBench is helpful for performing architecture and small-to-medium scale system researches for datacenter computing.Keywords
This publication has 15 references indexed in Scilit:
- Enabling accurate power profiling of HPC applications on exascale systemsPublished by Association for Computing Machinery (ACM) ,2013
- BTL: A Framework for Measuring and Modeling Energy in Memory HierarchiesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2012
- Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy BridgeIEEE Micro, 2012
- Characterizing the energy consumption of data transfers and arithmetic operations on x86−64 processorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2010
- Comparing cache architectures and coherency protocols on x86-64 multicore SMP systemsPublished by Association for Computing Machinery (ACM) ,2009
- Real time power estimation and thread scheduling via performance countersACM SIGARCH Computer Architecture News, 2009
- PowerPack: Energy Profiling and Analysis of High-Performance Systems and ApplicationsIEEE Transactions on Parallel and Distributed Systems, 2009
- 3D-Stacked Memory Architectures for Multi-core ProcessorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2008
- A systematic method for functional unit power estimation in microprocessorsPublished by Association for Computing Machinery (ACM) ,2006
- Run-time power estimation in high performance microprocessorsPublished by Association for Computing Machinery (ACM) ,2001