Multilevel Data Storage Memory Devices Based on the Controlled Capacitive Coupling of Trapped Electrons
- 25 February 2011
- journal article
- research article
- Published by Wiley in Advanced Materials
- Vol. 23 (18), 2064-2068
- https://doi.org/10.1002/adma.201004150
Abstract
No abstract availableKeywords
This publication has 49 references indexed in Scilit:
- Vertical flash memory with protein-mediated assembly of nanocrystal floating gateApplied Physics Letters, 2007
- Highly Ordered Arrays of Nanoparticles in Large Areas from Diblock Copolymer Micelles in Hexagonal Self-AssemblyChemistry of Materials, 2006
- Data Retention Characteristics of Nitride-Based Charge Trap Memory Devices with High-k Dielectrics and High-Work-Function Metal Gates for Multi-Gigabit Flash MemoryJapanese Journal of Applied Physics, 2006
- Nanoscale Memory Elements Based on Solid-State ElectrolytesIEEE Transactions on Nanotechnology, 2005
- Low-cost and nanoscale non-volatile memory concept for future silicon chipsNature Materials, 2005
- High‐Mobility Air‐Stable n‐Type Semiconductors with Processing Versatility: Dicyanoperylene‐3,4:9,10‐bis(dicarboximides)Angewandte Chemie-International Edition, 2004
- Low-voltage organic transistors with an amorphous molecular gate dielectricNature, 2004
- Charge-trap memory device fabricated by oxidation of Si/sub 1-x/Ge/sub x/IEEE Transactions on Electron Devices, 2001
- Charge retention of scaled SONOS nonvolatile memory devices at elevated temperaturesSolid-State Electronics, 2000
- Flash memory cells-an overviewProceedings of the IEEE, 1997