A Compact 75 GHz LNA with 20 dB Gain and 4 dB Noise Figure in 22nm FinFET CMOS Technology
- 1 June 2018
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper presents E-band (71-76 GHz) LNA design in 22nm CMOS FinFET technology. Stacked topology with DC current re-use for 2-stage cascaded LNA results in power efficient design with high performance. Measurement shows peak gain of 20 dB and minimum noise figure of 4 dB with 10.8 mA current consumption from 1 V supply. Measured 3-dB bandwidth is 10.4 GHz and input P 1dB is -22.8 dBm. The active layout area of the LNA is 0.155 mm 2 . To the authors' knowledge, these are the state-of-art values in terms of noise figure and DC power consumption among E-band CMOS LNAs reported in the literature.Keywords
This publication has 7 references indexed in Scilit:
- 22FFL: A high performance and ultra low power FinFET technology for mobile and RF applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2017
- A 54.4–90 GHz Low-Noise Amplifier in 65-nm CMOSIEEE Journal of Solid-State Circuits, 2017
- On the Design of Wideband Transformer-Based Fourth Order Matching Networks for ${E}$ -Band Receivers in 28-nm CMOSIEEE Journal of Solid-State Circuits, 2017
- Pole-Converging Intrastage Bandwidth Extension Technique for Wideband AmplifiersIEEE Journal of Solid-State Circuits, 2017
- 13.5 A 4-antenna-path beamforming transceiver for 60GHz multi-Gb/s communication in 28nm CMOSPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2016
- A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOSIEEE Journal of Solid-State Circuits, 2008
- Distributed active transformer-a new power-combining and impedance-transformation techniqueIEEE Transactions on Microwave Theory and Techniques, 2002