FPGA Implementation of Power Aware FIR Filter Using Reduced Transition Pipelined Variable Precision Gating

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Publisher Website

1 February 2008

journal article
Published by Science Publications in Journal of Computer Science

Vol. 4 (2), 87-94
https://doi.org/10.3844/jcssp.2008.87.94

Abstract

FPGA Implementation of Power Aware FIR Filter Using Reduced Transition Pipelined Variable Precision Gating

Keywords

Cited by 2 articles