The next generation UltraSPARC-I CPU represents a significant step forward in processor performance at the cost of increased design complexity. Added complexity increases the risks in achieving functionally correct first silicon. Existing design verification techniques were supplemented by applying emulation to obtain an early look at functionality. Discussed are the goals, methods and results of the UltraSPARC-I emulation. I. INTRODUCTION Emulation is a method of functionally implementing a logic design with performance several orders of magnitude faster than simulation for the purpose of design verification. Emula- tion requires the use of dynamically configured hardware in which to implement the design. Emulation differs from tradi- tional simulation in that the emulation hardware implements the functionality of the design while simulation is a general- ized program that models the functionality while executing on a general purpose host computer. Where simulation processes events sequentially, emulation operates in parallel, as will the final silicon, resulting in fast emulation speeds of approxi- mately 500 KHz. The UltraSPARC-I CPU from SPARC Technology, a divi- sion of Sun Microsystems, Inc., is a high-performance 64-bit V9 SPARC implementation 100% compatible with existing binaries (1)(2)(3)(4)(5)(6). It is a 4 way superscalar design using 9 functional units. Support for either tightly-coupled or loosely-coupled multiprocessing is provided. New VISual instructions provide outstanding performance for multi-media