Turning liabilities into assets: Exploiting deep submicron CMOS technology to design secure embedded circuits

Abstract

This paper explores an unexpected link between system-level security considerations and deep-submicron CMOS circuits. Many deep-submicron effects including increased leakage power, process variability, noise-level, power- density and integration density are thought of to be liabilities for integrated design. However, we show how they may instead be an asset for certain types of secure circuits. These circuits are useful for secure embedded systems design, where stringent cost-, power- and implementation constraints, as well as the increased risk towards physical attacks, are among the design issues. We also conclude that not all deep sub-micron liabilities are secure-circuit assets, and point out some of the open challenges in secure circuit design.