Polarity control in double-gate, gate-all-around vertically stacked silicon nanowire FETs
- 1 December 2012
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 8.4.1-8.4.4
- https://doi.org/10.1109/iedm.2012.6479004
Abstract
We fabricated and characterized new ambipolar silicon nanowire (SiNW) FET transistors featuring two independent gate-all-around electrodes and vertically stacked SiNW channels. One gate electrode enables dynamic configuration of the device polarity (n or p-type), while the other switches on/off the device. Measurement results on silicon show I on /I off > 10 6 and S ≈ 64mV/dec (70mV/dec) for p(n)-type operation in the same device. We show that XOR operation is embedded in the device characteristic, and we demonstrate for the first time a fully functional 2-transistor XOR gate.Keywords
This publication has 6 references indexed in Scilit:
- Reconfigurable Silicon Nanowire TransistorsNano Letters, 2011
- Improved thermoelectric performance of organic thin-film elements utilizing a bilayer structure of pentacene and 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (F4-TCNQ)Applied Physics Letters, 2010
- CNTFET Modeling and Reconfigurable Logic-Circuit DesignIEEE Transactions on Circuits and Systems I: Regular Papers, 2007
- Enhanced Channel Modulation in Dual-Gated Silicon Nanowire TransistorsNano Letters, 2005
- High-Performance Carbon Nanotube Field-Effect Transistor With Tunable PolaritiesIEEE Transactions on Nanotechnology, 2005
- Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectric and metal gate electrodeSolid-State Electronics, 2004