Identifying energy-efficient concurrency levels using machine learning
- 1 January 2007
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2007 IEEE International Conference on Cluster Computing
Abstract
Multicore microprocessors have been largely motivated by the diminishing returns in performance and the increased power consumption of single-threaded ILP microprocessors. With the industry already shifting from multicore to many-core microprocessors, software developers must extract more thread-level parallelism from applications. Unfortunately, low power-efficiency and diminishing returns in performance remain major obstacles with many cores. Poor interaction between software and hardware, and bottlenecks in shared hardware structures often prevent scaling to many cores, even in applications where a high degree of parallelism is potentially available. In some cases, throwing additional cores at a problem may actually harm performance and increase power consumption. Better use of otherwise limitedly beneficial cores by software components such as hypervisors and operating systems can improve system-wide performance and reliability, even in cases where power consumption is not a main concern. In response to these observations, we evaluate an approach to throttle concurrency in parallel programs dynamically. We throttle concurrency to levels with higher predicted efficiency from both performance and energy standpoints, and we do so via machine learning, specifically artificial neural networks (ANNs). One advantage of using ANNs over similar techniques previously explored is that the training phase is greatly simplified, thereby reducing the burden on the end user. Using machine learning in the context of concurrency throttling is novel. We show that ANNs are effective for identifying energy-efficient concurrency levels in multithreaded scientific applications, and we do so using physical experimentation on a state-of-the-art quad-core Xeon platform.Keywords
This publication has 7 references indexed in Scilit:
- Fast compiler optimisation evaluation using code-feature based performance predictionPublished by Association for Computing Machinery (ACM) ,2007
- Enabling scalability and performance in a large scale CMP environmentPublished by Association for Computing Machinery (ACM) ,2007
- Online power-performance adaptation of multithreaded programs using hardware event-based predictionPublished by Association for Computing Machinery (ACM) ,2006
- Online strategies for high-performance power-aware thread execution on emerging multiprocessorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2006
- Cross-Platform Performance Prediction of Parallel Applications Using Partial ExecutionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Cross-architecture performance predictions for scientific applications using parameterized modelsPublished by Association for Computing Machinery (ACM) ,2004
- Automatically characterizing large scale program behaviorPublished by Association for Computing Machinery (ACM) ,2002