Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints
- 1 January 2005
- book chapter
- conference paper
- Published by Springer Science and Business Media LLC in Lecture Notes in Computer Science
- p. 172-186
- https://doi.org/10.1007/11545262_13
Abstract
No abstract availableKeywords
This publication has 13 references indexed in Scilit:
- Side-Channel Leakage of Masked CMOS GatesLecture Notes in Computer Science, 2005
- Improving smart card security using self-timed circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- An Offset-Compensated Oscillator-Based Random Bit Source for Security ApplicationsLecture Notes in Computer Science, 2004
- Strong Authentication for RFID Systems Using the AES AlgorithmPublished by Springer Science and Business Media LLC ,2004
- Improving the Security of Dual-Rail CircuitsPublished by Springer Science and Business Media LLC ,2004
- Security Evaluation of Asynchronous CircuitsLecture Notes in Computer Science, 2003
- Examining smart-card security under the threat of power analysis attacksIEEE Transactions on Computers, 2002
- Towards Sound Approaches to Counteract Power-Analysis AttacksLecture Notes in Computer Science, 1999
- Differential Power AnalysisLecture Notes in Computer Science, 1999
- DES and Differential Power Analysis The “Duplication” MethodLecture Notes in Computer Science, 1999