Radiation-Hard CMOS/SOS Standard Cell Circuits

Abstract

A new multiport silicon-gate, CMOS/SOS standard cell family that achieves transient upset and total dose hardness has been designed and evaluated. This radiation hardness was achieved by design and process procedures normally not considered in conventional CMOS/SOS circuits. To evaluate the cell family a test chip and arithmetic logic unit (ALU) integrated circuits were fabricated. The cell-family performance was characterized utilizing 60ns to lμs electron pulses from the LINAC and total dose gamma irradiation from the cobalt-60 source. The results show circuit upset at levels greater than 1011 rad (Si)/s for short (60ns) irradiation pulses. Total dose irradiations to 106 rad (Si) indicate a 20 percent reduction in circuit speed and a factor of 10 increase in chip leakage. Utilizing these standard cell building blocks, radiation hard, quick-turnaround, low-cost custom LSI arrays can be fabricated using design automation techniques.