Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
- 23 December 2004
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Abstract
In this paper, we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We use the process networks model as a coordination language which is interpreted on a virtual machine run-time system. We present and discuss the results of a design space exploration, which evaluates the performance of the system architecture for different configurations.Keywords
This publication has 3 references indexed in Scilit:
- Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual MachinePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2004
- Laura: Leiden Architecture Research and Exploration ToolLecture Notes in Computer Science, 2003
- Chip-Based Reconfigurable Task ManagementLecture Notes in Computer Science, 2001