Abstract
This work analyzes heterojunction with intrinsic thin layer (HIT) solar cells using numerical simulations. The differences between the device physics of cells with p- and n-type crystalline silicon (c-Si) wafers are substantial. HIT solar cells with n-type wafers essentially form a n/p/n structure, where tunneling across the junction heterointerfaces is a critical transport mechanism required to attain performance exceeding 20%. For HIT cells with p-type wafers, only tunneling at the back-contact barrier may be important. For p-wafer cells, the hydrogenated amorphous silicon (a-Si:H) between the indium tin oxide (ITO) and crystalline silicon may act as a passivating buffer layer but, otherwise, does not significantly contribute to device performance. For n-wafer cells, the carrier concentration and band alignment of this a-Si:H layer are critical to device performance.