The case for SRAM main memory
- 1 December 1996
- journal article
- Published by Association for Computing Machinery (ACM) in ACM SIGARCH Computer Architecture News
- Vol. 24 (5), 23-30
- https://doi.org/10.1145/242694.242709
Abstract
The growing CPU-memory gap is resulting in increasingly large cache sizes. As cache sizes increase, associativity becomes less of a win. At the same time, since costs of going to DRAM increase, it becomes more valuable to be able to pin critical data in the cache---a problem if a cache is direct-mapped or has a low degree of associativity. Something else which is a problem for caches of low associativity is reducing misses by using a better replacement policy. This paper proposes that L2 cache sizes are now starting to reach the point where it makes more sense to manage them as the main memory of the computer, and relegate the traditional DRAM main memory to the role of a paging device. The paper details advantages of an SRAM main memory, as well as problems that need to be solved, in managing an extra level of virtual to physical translation.Keywords
This publication has 7 references indexed in Scilit:
- Avoiding conflict misses dynamically in large direct-mapped cachesPublished by Association for Computing Machinery (ACM) ,1994
- Predicting and precluding problems with memory latencyIEEE Micro, 1994
- Restructuring a parallel simulation to improve cache behavior in a shared-memory multiprocessorPublished by Association for Computing Machinery (ACM) ,1993
- Design tradeoffs for software-managed TLBsPublished by Association for Computing Machinery (ACM) ,1993
- Computer technology and architecture: an evolving interactionComputer, 1991
- Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffersPublished by Association for Computing Machinery (ACM) ,1990
- Cache MemoriesACM Computing Surveys, 1982