A Room Temperature 0.1 /spl mu/m CMOS on SOI

Abstract
An advanced 0.1 /spl mu/m CMOS technology on SOI is presented. In order to minimize short channel effects, relatively thick non- delpleted (0.1 /spl mu/m) SOI film, highly non-uniforin channel doping and source-drain extension-HALO were used. Excellent short channel effects (SCE) down to channel lengths below 0.1 /spl mu/m were obtained. Very high speeds were obtained: Unloaded delay was 20 psec, and fully loaded NAND (FI=FO=3, CL-0.3 pF) delay was 130 psec at supply of 1.8 V.