Considerations for Ultimate CMOS Scaling
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- 30 June 2012
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 59 (7), 1813-1828
- https://doi.org/10.1109/TED.2012.2193129
Abstract
This review paper explores considerations for ultimate CMOS transistor scaling. Transistor architectures such as extremely thin silicon-on-insulator and FinFET (and related architectures such as TriGate, Omega-FET, Pi-Gate), as well as nanowire device architectures, are compared and contrasted. Key technology challenges (such as advanced gate stacks, mobility, resistance, and capacitance) shared by all of the architectures will be discussed in relation to recent research results.Keywords
This publication has 126 references indexed in Scilit:
- Nanometre-scale electronics with III–V compound semiconductorsNature, 2011
- Multigate transistors as the future of classical metal–oxide–semiconductor field-effect transistorsNature, 2011
- Atomic layer deposition of Al2O3 on S-passivated GeMicroelectronic Engineering, 2011
- Metal-oxide-semiconductor capacitors with ZrO2 dielectrics grown on In0.53Ga0.47As by chemical beam depositionApplied Physics Letters, 2009
- Ge (100) and (111) N- and P-FETs With High Mobility and Low-$T$ Mobility CharacterizationIEEE Transactions on Electron Devices, 2009
- Capacitance-voltage studies on enhancement-mode InGaAs metal-oxide-semiconductor field-effect transistor using atomic-layer-deposited Al2O3 gate dielectricApplied Physics Letters, 2006
- SiGe source/drain structure for the suppression of the short-channel effect of sub-0.1-μm p-channel MOSFETsIEEE Transactions on Electron Devices, 2001
- Material and process limits in silicon VLSI technologyProceedings of the IEEE, 2001
- Short-channel effect improved by lateral channel-engineering in deep-submicronmeter MOSFET'sIEEE Transactions on Electron Devices, 1997
- Calculated threshold-voltage characteristics of an XMOS transistor having an additional bottom gateSolid-State Electronics, 1984