An SEU-Tolerant Programmable Frequency Divider
- 1 March 2007
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 899-904
- https://doi.org/10.1109/isqed.2007.36
Abstract
A programmable frequency divider, designed to mitigate radiation-induced single event upsets (SEU), is proposed. The circuit is immune to both SEUs from storage circuits and those induced by single event transient (SET) from combinational logic. The SEU immunity of storage element is achieved by constructing the element with a novel SEU-hardened latch which doesn't need transistor sizing to be functional and SEU-tolerant. SET tolerance is achieved by making full use of the existing parts and producing further necessary redundancies. The proposed structures are implemented and simulated using a standard 0.18mum logic process model. Simulation results show that the proposed frequency divider works correctly when attacked as well as during normal operations, with acceptable area and power overheadKeywords
This publication has 7 references indexed in Scilit:
- Radiation-induced soft errors in advanced semiconductor technologiesIEEE Transactions on Device and Materials Reliability, 2005
- Design for soft error mitigationIEEE Transactions on Device and Materials Reliability, 2005
- Single event transient pulse widths in digital microcircuitsIEEE Transactions on Nuclear Science, 2004
- Basic mechanisms and modeling of single-event upset in digital microelectronicsIEEE Transactions on Nuclear Science, 2003
- Soft error rate mitigation techniques for modern microcircuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Design of SEU-hardened CMOS memory cells: the HIT cellPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Upset hardened memory design for submicron CMOS technologyIEEE Transactions on Nuclear Science, 1996