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Automatic verification of finite state concurrent system using temporal logic specifications
Home
Publications
Automatic verification of finite state concurrent system using temporal logic specifications
Automatic verification of finite state concurrent system using temporal logic specifications
EC
E. M. Clarke
E. M. Clarke
EE
E. A. Emerson
E. A. Emerson
AS
A. P. Sistla
A. P. Sistla
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1 January 1983
conference paper
conference paper
Published by
Association for Computing Machinery (ACM)
p.
117-126
https://doi.org/10.1145/567067.567080
Abstract
No abstract available
Cited by 186 articles