A memory access model for highly-threaded many-core architectures
Open Access
- 1 January 2014
- journal article
- Published by Elsevier BV in Future Generation Computer Systems
- Vol. 30, 202-215
- https://doi.org/10.1016/j.future.2013.06.020
Abstract
No abstract availableKeywords
Funding Information
- NSF (CNS-0905368, CNS-0931693)
- Exegy, Inc
This publication has 45 references indexed in Scilit:
- Blocked All-Pairs Shortest Paths Algorithm for Hybrid CPU-GPU SystemPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2011
- Bloom Filter Performance on Graphics EnginesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2011
- Accelerating CUDA graph algorithms at maximum warpPublished by Association for Computing Machinery (ACM) ,2011
- CUDASW++2.0: enhanced Smith-Waterman protein database search on CUDA-enabled GPUs based on SIMT and virtualized SIMD abstractionsBMC Research Notes, 2010
- Fast tridiagonal solvers on the GPUPublished by Association for Computing Machinery (ACM) ,2010
- Model-driven autotuning of sparse matrix-vector multiply on GPUsPublished by Association for Computing Machinery (ACM) ,2010
- Real-time parallel hashing on the GPUACM Transactions on Graphics, 2009
- Designing efficient sorting algorithms for manycore GPUsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2009
- Benchmarking GPUs to tune dense linear algebraPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2008
- A Memory Model for Scientific Algorithms on Graphics ProcessorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2006