Understanding MOSFET mismatch for analog design
Top Cited Papers
- 10 March 2003
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 38 (3), 450-456
- https://doi.org/10.1109/jssc.2002.808305
Abstract
Despite the significance of matched devices in analog circuit design, mismatch modeling for design application has been lacking. This paper addresses misconceptions about MOSFET mismatch for analog design. V/sub t/ mismatch does not follow a simplistic 1/(/spl radic/area) law, especially for wide/short and narrow/long devices, which are common geometries in analog circuits. Further, V/sub t/ and gain factor are not appropriate parameters for modeling mismatch. A physically based mismatch model can be used to obtain dramatic improvements in prediction of mismatch. This model is applied to MOSFET current mirrors to show some nonobvious effects over bias, geometry, and multiple-unit devices.Keywords
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