Analysis on electrical parameters including temperature and interface trap charges in gate overlap Ge source step shape double gate TFET
- 1 December 2022
- journal article
- research article
- Published by Elsevier BV in Microelectronics Journal
Abstract
No abstract availableKeywords
This publication has 28 references indexed in Scilit:
- Drain Extended Tunnel FET—A Novel Power Transistor for RF and Switching ApplicationsIEEE Transactions on Electron Devices, 2016
- Interfacial Charge Analysis of Heterogeneous Gate Dielectric-Gate All Around-Tunnel FET for Improved Device ReliabilityIEEE Transactions on Device and Materials Reliability, 2016
- Demonstration of L-Shaped Tunnel Field-Effect TransistorsIEEE Transactions on Electron Devices, 2015
- Current Status of Reliability in Extended and Beyond CMOS DevicesIEEE Transactions on Device and Materials Reliability, 2014
- Effect of Drain Doping Profile on Double-Gate Tunnel Field-Effect Transistor and its Influence on Device RF PerformanceIEEE Transactions on Nanotechnology, 2014
- Controlling Ambipolar Current in Tunneling FETs Using Overlapping Gate-on-DrainIEEE Journal of the Electron Devices Society, 2014
- Tunnel FET technology: A reliability perspectiveMicroelectronics Reliability, 2014
- Investigations on Line-Edge Roughness (LER) and Line-Width Roughness (LWR) in Nanoscale CMOS Technology: Part II–Experimental Results and Impacts on Device VariabilityIEEE Transactions on Electron Devices, 2013
- Direct and Indirect Band-to-Band Tunneling in Germanium-Based TFETsIEEE Transactions on Electron Devices, 2011
- Temperature dependence of the energy gap in semiconductorsPhysica, 1967