2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC)

Conference Information
Name: 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC)
Date: 2013-10-5 - 2013-10-10

Latest articles from this conference

Frank Matus
2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) pp 1-15; https://doi.org/10.1109/dasc.2013.6719666

The FAA and industry partnering to expand data communication. It is committed to expand its services. Studying near term en-route services to increase participation and possible expansion of services in next 1-2 years. The DCIT has been influential in working end-to-end concepts. Increasing user participation & maintaining commitment to increased services prior to 2020. Their operational trials are providing substantial benefit. Allowed FAA to gather data on multiple implementations of the technology. Worked with operators and controller community to refine operational concepts.
Laurence H. Mutuel
2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) pp 1-16; https://doi.org/10.1109/dasc.2013.6719739

Sandwiched in-between November rainstorms, a crew of Rockwell engineers successfully launched and flew the UCLA-Rockwell Unmanned Air Vehicle (UAV) during tests on Nov. 19 at El Mirage Dry Lake in the Mojave Desert. The battery powered, 40-foot-wing-span craft was released from its remote launch vehicle and flew perfectly for about three minutes at around 100 feet altitude, while jubilant engineers chased the aircraft around across the dry lake in a convertible.
Hugh Blair-Smith
2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) pp 1-31; https://doi.org/10.1109/dasc.2013.6719736

This article consists of a collection of slides from the author's conference presentation. This is an outline of his 2014 book, Left Brains for the Right Stuff: Computer & Rocket Science at MIT (Publisher TBD).
Roger Connor
2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) pp 1-30; https://doi.org/10.1109/dasc.2013.6719737

This article consists of a collection of slide images from the author's conference presentation. There is not text to this presentation.
Carlos C. Insaurralde, , Santiago Cifuentes,
2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) pp 7A1-1-7A1-10; https://doi.org/10.1109/dasc.2013.6712630

There is an increasing interest to develop methodologies to reduce costs and risks in the development process of control software systems. A suitable solution is a shortcut in the classical development V-diagram to verify and validate the software requirements at early development stages, and automation of the code generation from models. This paper presents the simulation outcomes of a Helicopter Distributed Fuel Control System (HDFCS) that is developed by following the above software design methodology. It involves Smart Fuel Components (SFCs), and deals with an automated design tool and a simulation process for SFCs. The methodological approach chosen addresses the functional aspects of a HDFCS as to design and synthesis automation, and simulation. The software synthesis automation is carried out by the design computer tool that captures the behavior of the SFCs and system in flowchart diagrams. The software code generated by the above tool is utilized by the simulator for functional verification and validation. This paper also shows procedural aspects of the methodology for the automated software design and synthesis, illustrative test case studies showing how the control software code is tested, and simulation results.
Romain Martin, Guillaume Terrasson, Renaud Briand, Olivier Guerineau, Marc Gatti, Rashad Martin
2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) pp 4C2-1-4C2-11; https://doi.org/10.1109/dasc.2013.6712586

The purpose of our work is to demonstrate the main contributions of Fault Detection and Identification (FDI) function implementation into Flight Critical Systems (FCS). Consequently we propose, in this paper, a method to estimate the performance of an implemented FDI function, through its modeling and simulation. This method aims to evaluate the impact of different FDI functions into FCS safety and integrity aspects and then, to choose the most suitable FDI function adapted to a specific FCS.
Patrick Huyck
2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) pp 7B2-1-7B2-12; https://doi.org/10.1109/dasc.2013.6712636

To satisfy the increasing demands in computing throughput, new processor designs are frequently expanding their support for parallel operations, including multiple memory controllers, caches, and various I/O devices, but especially multiple processor cores. For developers of real-time embedded systems with security and/or safety-critical computing requirements, the advent of processors that include multiple cores has created a fundamental problem: how to satisfy certification considerations so that safety and/or security related applications can execute on real-time multi-core based partitioning enforcing systems. This paper examines some architectural considerations that may be taken into account as part of safety and/or security certification of a partitioning operating system that supports the scheduling of multiple applications on a multi-core processor. In particular, it covers a set of considerations and challenges associated with using multiple cores as part of an architecture that supports simultaneous execution of applications on different cores and as part of an architecture that supports simultaneous use of multiple cores cooperatively within an application. This includes high-level considerations of safety and security topics such as, shared resource management, caching, covert channels, and fault management. In addition, it examines the use of synchronous time-scheduling controls as a means to resolve some of the safety and security related issues. This paper, by examining and detailing some of the high-level safety and security considerations associated with multi-core processor architectures, is intended to demonstrate the benefits of utilizing synchronous time-scheduling controls across the entire multi-core processor as a means to resolve some of the issues. Developers of real-time embedded systems can maximize the benefit of multi-core processors through understanding the types of architectural features that may be necessary to resolve specific safety and/or security issues.
Nancy Smith
2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC) pp 1-35; https://doi.org/10.1109/dasc.2013.6719686

• Enhancements to TAPSS tools (slot markers and timelines) can facilitate the use of RNAV OPDs without sacrificing throughput in a challenging airspace • Enhancements to TMA regarding schedule coordination to converging runways can significantly increase throughput • Next steps: - Identifying necessary parameters for automating coordinated schedules to converging runways. - Evaluating the tools in less ideal environments -e.g., convective weather, one runway operations, etc.
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