Circuits and Systems
ISSN / EISSN : 2153-1285 / 2153-1293
Current Publisher: Scientific Research Publishing, Inc. (10.4236)
Total articles ≅ 642
Latest articles in this journal
Circuits and Systems, Volume 11, pp 39-49; doi:10.4236/cs.2020.114004
Circuits and Systems, Volume 11, pp 1-9; doi:10.4236/cs.2020.111001
Circuits and Systems, Volume 11, pp 51-56; doi:10.4236/cs.2020.115005
This paper presents a floating resistor employing CIDITA (current inverting differential input transconductance amplifier). The proposed floating resistor is based on CMOS technology of 0.18 μm. For the realization of this floating inductor, two CIDITA have been cascaded together, no other passive elements are used, giving advantage of reduced chip area and hence reduced losses. The given circuit topology has an advantage of realizing both positive and negative resistors. This paper presents a simple circuitry of floating resistor in which the value of resistance can be tuned by adjusting the gate voltage of MOSFET. The PSpice simulation result shows constant resistance of 1.6 KΩ for frequency bandwidth of 1 Hz to 1 MHz, with supply voltage of ±1.25 volts.
Circuits and Systems, Volume 11, pp 57-64; doi:10.4236/cs.2020.116006
An efficient way of noise reduction has been presented: A modified Costas loop called as Masterpiece. The basic version of the Costas loop has been developed for SSB SC demodulation, but the same circuit can be applied for QAM (quadrature amplitude modulation) demodulation as well. Noise sensitivity of the basic version has been decreased. One trick is the transformation of the real channel input into complex signal, the other one is the application of our folding algorithm. The result is that the Masterpiece provides a 4QAM symbol error rate (SER) of 6 × 10−4 for input signal to noise ratio (SNR) of −1 dB. In this paper, an improved version of the original Masterpiece is introduced. The complex channel input signal is normalized, and rotational average is applied. The 4QAM result is SER of 3 × 10−4 for SNR of −1 dB. At SNR of 0 dB, the improved version produces 100 times better SER than that the original Costas loop does. In our times, this topic has a special importance because by application of our Masterpiece, all dangerous field strengths from 5G and WiFi, could be decreased by orders of magnitude. The Masterpiece can break the Shannon formula.
Circuits and Systems, Volume 11, pp 27-38; doi:10.4236/cs.2020.113003
A delay-locked loop based hybrid phase conjugator (DLL-HPC) is presented as a possible solution for 5G beamforming. Theoretical background, unique capabilities, and experimental verification are presented. The proposed DLL-HPC provides backwards compatibility with existing beamforming protocols as well as sub-millisecond beamsteering and automatic mobile target tracking with zero communication overhead. A proof-of-concept DLL-HPC prototype has been constructed from commercially available components to operate in the 5G NR-FR1 band, indicating that the technique can be readily adopted with available technology.
Circuits and Systems, Volume 11, pp 11-26; doi:10.4236/cs.2020.112002
This paper presents a higher order voltage and current mode low pass or high pass filter for wave active filter based on Voltage Differencing Transconductance Amplifiers (VDTAs). The wave equivalent variable technique and topological simulation as well as operational realization using wave variables techniques are proposed for basic active building blocks of wave active filters. The proposed wave equivalent technique is employed for wave active filter with the proper selection of the terminal connections. This work presented the basic element for the realizing wave active filter is the series inductor with parallel grounded capacitor. The proposed wave active filter is verified by realizing a 4th order low pass and high pass Butterworth filter with minimum power consumption at ±0.82 V using SPICE simulation with 0.18 μm TSMC CMOS technology parameters.
Circuits and Systems, Volume 10, pp 1-19; doi:10.4236/cs.2019.101001
This paper documents design and modeling of a grid-connected emergency back-up power supply for medium power applications. Back-up power supplies are very important in regard to support electrical loads in the events of grid power outage. However, grid-integration of a back-up power supply substantiates continual power transfer to the loads, especially to the critical loads, which should not suffer from power interruptions. Therefore, design and circuit modeling of switching converters based reliable grid-tied emergency back-up power supply are presented in this paper. There are a rectifier-link boost derived battery charging circuit and a 4-switch push-pull power inverter circuit which are controlled by high frequency pulse width modulation (PWM) signals. This paper presents a state averaging model and Laplace domain transfer function of the charging circuit and a switching converter model of the power inverter circuit. A changeover relay based transfer switch controls the power flow towards the utility loads. During off-grid situations, loads are fed power by the proposed inverter circuit and during on-grid situations, battery is charged by an ac-link rectifier-fed boost converter. However, there is a relay switching circuit to control the charging phenomenon of the battery. The proposed design is simulated in PLECS and the simulation results corroborate the reliability of the presented framework.
Circuits and Systems, Volume 10, pp 45-53; doi:10.4236/cs.2019.104004
This paper presents a model of cancer diagnosis using principal electrical parameters of tumor cells such as the relative permittivity and the conductivity. The proposed model involves a square microstrip antenna and breast phantom comprising a tumor cell. The radiation properties of the designed antenna at the ISM bands, such as the Return Loss (RL), the current density, the electrical field and the Specific Absorption Rate (SAR) are exploited for diagnosing purposes. The Ansoft HFSS (13.0) simulated results show that the difference in terms of the RL, the current density, the electrical field and the SAR is higher than 2 dB, 40 A/m2, 100 V/m and 20 W/kg respectively, once the tumor exists inside the breast model. This proposed technique in turn can be exploited to distinguish malignant cells inside the women breast in earlier stages as compared to other traditional techniques such as mammography, X-ray, ultra-sound, tomography and MRI.
Circuits and Systems, Volume 10, pp 37-44; doi:10.4236/cs.2019.103003
The primary intent of this paper is to investigate the potential of using a slotted circular patch antenna at 2.45 GHz for breast tumor hyperthermia treatment. A cancer treatment model consisting of a microstrip patch antenna and breast phantom comprising tumor is designed and simulated in CST Studio Suite 2018. The radiation properties of the proposed antenna attain 3 dB beam width of 74.1° and 70.5° for the E-Plane and the H-plane, respectively. The breast phantom is exposed to the designed antenna radiation for 10 minutes, leading to raise the breast phantom temperature by 8.5°C and 11.4°C once the antenna pumped power is 1.5 and 2 watt, respectively. By considering 10 minutes as an exposure time, the breast temperature as a function of the applied antenna power is studied and compared with previous published results.
Circuits and Systems, Volume 10, pp 21-36; doi:10.4236/cs.2019.102002
Based on 2-D device simulations and mixed-mode transient simulations, DC and transient discharge characteristics of a usual diode string utilizing a standard CMOS process, and a diode string utilizing a triple-well CMOS process, which can serve as an essential VDD-VSS clamp device for CMOS input ESD protection were compared. Transient discharge characteristics including peak voltages developed across gates oxides of transistors in input buffers, lattice heating inside ESD protection devices, and ratios of discharge current components at its peak inside the diode-string clamp were compared. DC standby current levels added per each input pad structure, which are the critical parameters determining usefulness of the devices, were also compared. We showed that the diode-string devices in comparison can serve successfully as a VDD-VSS clamp device for ESD protection by virtue of the dominant pnpn thyristor-related conduction mechanisms. Optimization of design parameters including anode-cathode contact spacing in each diode in the string, device width of the diode string, and number of diodes in the diode string was performed to present transient discharge and DC characteristics of some recommendable design examples, which can serve as a guideline in designing diode-string clamp devices.