Design of Diversified Low Power and High-Speed Comparators using 45nm Cmos Technology
Open Access
- 30 April 2022
- journal article
- Published by Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP in International Journal of Innovative Technology and Exploring Engineering
- Vol. 11 (5), 27-31
- https://doi.org/10.35940/ijitee.e9849.0411522
Abstract
At Present, portable battery-operated devices are enhancing due to low power consumption and high-speed applications, The designed circuit with feedback are used to design novel circuits. If the comparator having feedback are without clock signal. The comparators are mainly designed to minimize the power consumption and with good accuracy because of clock signal, if the clock signal is there, it is used to drive the circuit with low current. But in the existed design the circuit is with high power and current. These drawbacks are overcome by using the projected designed comparator. The Projected comparator design is with reduced power consumption, propagation delay, currents and with a smaller number of transistors. The comparators are useful in analog to digital converters. And this is simulated by using 45 nm CMOS technology Cadence Virtuoso tool.Keywords
This publication has 27 references indexed in Scilit:
- Low Input Resistance CMOS Current Comparator Based on the FVF for Low-Power ApplicationsCanadian Journal of Electrical and Computer Engineering, 2016
- 250-mV Supply Subthreshold CMOS Voltage Reference Using a Low-Voltage Comparator and a Charge-Pump CircuitIEEE Transactions on Circuits and Systems II: Express Briefs, 2014
- A High Frequency Active Voltage Doubler in Standard CMOS Using Offset-Controlled Comparators for Inductive Power TransmissionIEEE Transactions on Biomedical Circuits and Systems, 2012
- Comparator-Based Switched-Capacitor Circuits for Scaled CMOS TechnologiesIEEE Journal of Solid-State Circuits, 2006
- SET tolerant CMOS comparatorIEEE Transactions on Nuclear Science, 2004
- High fan-in dynamic cmos comparators with low transistor countIEEE Transactions on Circuits and Systems I: Regular Papers, 2003
- 1-V CMOS comparator for programmable analog rank-order extractorIEEE Transactions on Circuits and Systems I: Regular Papers, 2003
- High-performance and power-efficient CMOS comparatorsIEEE Journal of Solid-State Circuits, 2003
- Design techniques for high-speed, high-resolution comparatorsIEEE Journal of Solid-State Circuits, 1992
- A 100-MHz pipelined CMOS comparatorIEEE Journal of Solid-State Circuits, 1988