A Method of Optimizing Characteristic Impedance Compensation Using Cut-Outs in High-Density PCB Designs
Open Access
- 26 January 2022
- Vol. 22 (3), 964
- https://doi.org/10.3390/s22030964
Abstract
The modern era of technology contains a myriad of high-speed standards and proprietary serial digital protocols, which evolve alongside the microwave and RF realm. The increasing data rate push the requirements for hardware design, including modern printed circuit boards (PCB). One of these requirements for modern high-speed PCB interfaces are a homogenous track impedance all the way from the source to the load. Even though some high-speed interfaces don’t require any external components embedded into the interconnects, there are others which require either passive or active components—or both. Usually, component package land-pads are of fixed size, thus, if not addressed, they create discontinuities and degrade the transmitted signal. To solve this problem, impedance compensation techniques such as reference plane cut-out are employed for multiple case studies covering this topic. This paper presents an original method of finding the optimal cut-out size for the maximum characteristic impedance compensation in high-density multilayer PCB designs, which has been verified via theoretical estimation, computer simulation, and practical measurement results. Track-to-discontinuity ratios of 1:1.75, 1:2.5, and 1:5.0 were selected in order to resemble most practical design scenarios on a 6-layer standard thickness PCB. The measurements and simulations revealed that the compensated impedance saturation occurs at (150–250%) cut-out widths for a 50 Ω microstrip.Keywords
This publication has 6 references indexed in Scilit:
- Microstrip Impedance Management through Multilayer PCB Stack-Up: Discontinuity Compensation Voids with Asymmetric DielectricsSymmetry, 2021
- Reduced-Reflection Multilayer PCB Microstrip with Discontinuity CharacterizationElectronics, 2020
- Techniques of impedance matching for minimal PCB channel loss at 40 GBPS signal transmissionCircuit World, 2019
- RF modeling and optimization of end-launch SMA to trace transitionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2015
- Optimized surface mount structure for multi-Gigabit transmissionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2014
- Acceleration Techniques for Analysis of Microstrip StructuresElectronics and Electrical Engineering, 2014