Abstract
A 4:1 multiplexer (MUX) circuit in SiGe BiCMOS technology intended to directly drive a plasmonic Mach–Zehnder modulator for transmitter applications is presented. To achieve the highest data rates at a high output voltage swing, a power MUX concept is applied that maps the high-speed performance of the final clock signal onto the output data. In the clock tree a novel wideband clock phase shifter circuit is utilised for timing adjustment and frequency doubling. Electrical measurements of the chip demonstrate open eye diagrams for non-return-to-zero on-off-keying (NRZ-OOK) signals up to 180 Gbit/s, which is record speed for Si-based technologies. A differential output voltage swing of was measured that corresponds to an output voltage swing of more than without the bandwidth limit of the measurement equipment.