INVESTIGATION WITH TCSC, SSSC AND UPFC OF STATIC VOLTAGE STABILITY IN ZIP LOAD MODELING

Abstract

Maximum loading parameter-voltage in power systems of the nonlinear load modeling relation is important for static voltage stability. In this study, the effects on static voltage stability of static impedance, current, and active power (ZIP) load modeling in 5 buses power system are investigated. As maximum load analysis, Thyristor Controller Series Compensator (TCSC) Static Synchronous Seri Compensator (SSSC) and Unified Power Flow Controller (UPFC) from Flexible AC Transmission System (FACTS) devices are used. The impacts of ZIP load modeling on different parameter values were evaluated in terms of voltage-maximum loading parameters. Besides, voltage profile of 5 buses power system with TCSC, SSSC and UPFC in different parameter values was examined. Particularly, with use of UPFC has shown that static voltage stability is more effective and maximum load parameter value is increased.