Performance Analysis of Wavy FinFET and Optimization for Leakage Reduction

Abstract

FinFETs and Ultrathin Body FETs are promising candidates to enhance scaling trends of CMOS technology. Wavy FinFET is a hybrid device that combines these competing tech-nologies on SOI platform to provide high density and drivability without causing area penalty. The problem associated with this device is higher leakage and lower threshold voltage. Device engineering is the only solution for this problem. This work analyses the variation in performance of Wavy FinFET under various device/channel engineering methods such as substrate doping, halo doping and retrograde doping. Variation of iso-lation oxide thickness, work function engineering, and spacer engineering have also been tried out to optimize the device. The obtained results indicate that optimized Wavy FinFET can act as a solution for low power, highly reliable device topology. Leakage power is found to be reduced by 40.39%, 30.39% and 43.75% with substrate doping., halo doping and retrograde doping, respectively. Leakage power is lowered by 35.48% and 32.25% with increase in gate work function and isolation oxide thickness respectively. By using high k spacer material 54.77% reduction in leakage is further obtained without compromising drive current. By introducing structure modification such as ADSE, symmetric and asymmetric Dual k wavy FinFET leakage power is reduced by 61.35%, 44.19% and 28.25% respectively.