Vector Runahead for Indirect Memory Accesses
- 29 March 2022
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Micro
- Vol. 42 (4), 116-123
- https://doi.org/10.1109/mm.2022.3163132
Abstract
Vector Runahead delivers extremely high memory-level parallelism even for chains of dependent memory accesses with complex intermediate address computation, which conventional runahead techniques fundamentally cannot handle and therefore have ignored. It does this by rearchitecting runahead to use speculative data-level parallelism, rather than work-skipping, as its primary form of extracting more memory-level parallelism in runahead mode than a true execution can, which we hope will bring about an entirely new dimension for high-performance processors.Keywords
Funding Information
- Fonds Wetenschappelijk Onderzoek (G.0144.17N)
- Engineering and Physical Sciences Research Council (EP/P020011/1)
- H2020 European Research Council (741097)
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