Power, performance and area exploration of block matching algorithms mapped on programmable processors

Abstract

A comparison study of four blocking matching algorithms is presented in terms of performance, energy consumption and area, assuming five matching criteria. Two widely-used programmable processor cores, namely the embedded processor, ARM, with specialized memory hierarchy and the general purpose processor, Pentium/sup /spl copy//, are chosen for performing the comparative study, and eventually, determining the most efficient solution for certain design specifications. Adopting a systematic design methodology, efficient high-level transformations are applied to the considered algorithm structures resulting in performance-, energy-, and area-optimized solutions The plethora of alternative implementations under the different distance criteria and processor cores, offers flexibility to the designer in finding the most suitable solution for him/her, given the design specifications.