Design of a low power three bit ternary prefix adder using CNTFET technology
- 16 April 2020
- conference paper
- conference paper
- Published by AIP Publishing in AIP Conference Proceedings
- Vol. 2222 (1), 020005
- https://doi.org/10.1063/5.0003994
Abstract
Multi-valued logic (MVL) is that logic which has two or more logic values. In complex digital circuits, MVL (mainly Ternary logic) offers several advantages over binary logic. Carbon Nanotube Field Effect Transistor (CNTFET) technology is ideal to implement ternary logic circuits because of the threshold voltage of CNTFETs depends on the physical dimensions (chirality) of their channel. This work presents the implementation of a three-bit Ternary Prefix Adder using CNTFET technology. In this paper, a carry propagate-generate concept is used in order to implement the ternary prefix adder. A Kogge-Stone based prefix network is preferred for carry computation due to its high performance. A low power enoder is used for reducing the overall power of the adder. HSpice tool is chosen for designing this system. Simulation results show that there is a significant reduction in Power Delay Product (PDP) by 28 % compared to all other previous works.Keywords
This publication has 10 references indexed in Scilit:
- Design of High Speed and Power Efficient Ternary Prefix Adders using CNFETsIEEE Transactions on Nanotechnology, 2018
- Carbon nanotube FET‐based low‐delay and low‐power multi‐digit adder designsIET Circuits, Devices & Systems, 2016
- High-Efficient Circuits for Ternary AdditionVLSI Design, 2014
- A Novel CNTFET-based Ternary Full AdderCircuits, Systems, and Signal Processing, 2013
- Efficient Multiternary Digit Adder Design in CNTFET TechnologyIEEE Transactions on Nanotechnology, 2013
- Carbon Nanotubes for High-Performance Electronics—Progress and ProspectProceedings of the IEEE, 2008
- Regular Ternary Logic Functions—Ternary Logic Functions Suitable for Treating AmbiguityInternational Conference on Acoustics, Speech, and Signal Processing (ICASSP), 1986
- A Survey of Multivalued MemoriesInternational Conference on Acoustics, Speech, and Signal Processing (ICASSP), 1986
- Depletion/enhancement CMOS for a lower power family of three-valued logic circuitsIEEE Journal of Solid-State Circuits, 1985
- Low power dissipation MOS ternary logic familyIEEE Journal of Solid-State Circuits, 1984