CLAHE Implementation and Evaluation on a Low-End FPGA Board by High-Level Synthesis
- 1 December 2021
- journal article
- research article
- Published by Institute of Electronics, Information and Communications Engineers (IEICE) in IEICE Transactions on Information and Systems
- Vol. E104.D (12), 2048-2056
- https://doi.org/10.1587/transinf.2021pap0006
Abstract
Automobile companies have been trying to replace side mirrors of cars with small cameras for reducing air resistance. It enables us to apply some image processing to improve the quality of the image. Contrast Limited Adaptive Histogram Equalization (CLAHE) is one of such techniques to improve the quality of the image for the side mirror camera, which requires a large computation performance. Here, an implementation method of CLAHE on a low-end FPGA board by high-level synthesis is proposed. CLAHE has two main processing parts: cumulative distribution function (CDF) generation, and bilinear interpolation. During the CDF generation, the effect of increasing loop initiation interval can be greatly reduced by placing multiple Processing Elements (PEs). and during the interpolation, latency and BRAM usage were reduced by revising how to hold CDF and calculation method. Finally, by connecting each module with streaming interfaces, using data flow pragmas, overlapping processing, and hiding data transfer, our HLS implementation achieved a comparable result to that of HDL. We parameterized the components of the algorithm so that the number of tiles and the size of the image can be easily changed. The source code for this research can be downloaded from https://github.com/kokihonda/fpga_clahe.Keywords
This publication has 7 references indexed in Scilit:
- CLAHE implementation on a low-end FPGA board by high-level synthesisPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2020
- Image enhancement on digital x-ray images using N-CLAHEPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2017
- Resource efficient real-time processing of Contrast Limited Adaptive Histogram EqualizationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2016
- Low-latency histogram equalization for infrared image sequences: a hardware implementationJournal of Real-Time Image Processing, 2011
- Real-Time Processing of Contrast Limited Adaptive Histogram Equalization on FPGAPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2010
- Evaluation of contrast limited adaptive histogram equalization (CLAHE) enhancement on a FPGAPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2008
- Image enhancement by histogram transformationComputer Graphics and Image Processing, 1977