A Nonuniform Reference Voltage Optimization Based on Relative-Precision-Loss Ratios in MLC NAND Flash Memory

Abstract
In Multi-Level-Cell (MLC) NAND flash memory, cell-to-cell interference (CCI) and retention time have become the main noise that degrades the data storage reliability. To mitigate such noise, a relative precision loss (RPL) nonuniform reference voltage sensing strategy is proposed in this paper. First, based on the NAND flash channel model with CCI and retention noise, we simulate the data storage process of MLC NAND flash by Monte Carlo method, and find that the threshold-voltage of each disturbed storage state shows approximately to be Gaussian distributed. Then, by Gaussian approximation, the distribution of threshold voltage can be estimated easily in mathematics with a little loss. Second, we introduce a concept of log-likelihood ratio (LLR)-based RPL ratio to determine the dominating overlap regions, and then propose a new nonuniform reference voltage sensing strategy. This strategy does not only reduce the memory sensing precision (i.e., the number of reference voltages), but also maintains the reliability of the soft information of NAND flash memory channel output for soft decoding. Third, we implement extensive simulations to verify the performance of the new nonuniform sensing strategy. The BER performances of LDPC codes for different sensing strategies are provided to show that the proposed LLR-based RPL-nonuniform sensing strategy can make a good compromise between memory sensing latency and error-correction performance.