A 40-GHz bandwidth transimpedance amplifier with adjustable gain-peaking in 65-nm CMOS
- 1 August 2014
- conference paper
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)
- No. 15483746,p. 965-968
- https://doi.org/10.1109/mwscas.2014.6908577
Abstract
We present the design and characterization of a broadband, low-noise transimpedance amplifier (TIA) with adjustable gain-peaking, implemented in 65-nm CMOS. The TIA exhibits 40-GHz bandwidth, 20-dB gain and consumes 107 mW power. An additional continuously-tunable 12-dB gain-peaking near 40 GHz is available through a simple yet effective tuning mechanism, consuming only 14% more power. The adjustable gain-peaking functionality incorporated in the TIA can potentially reduce power consumption and complexity of an optical receiver and is highly desirable for adaptively-equalized receiver architectures. 50 Gb/s operation is demonstrated electrically as well as in an optical testbed. A low input-referred noise current of 2.5 uArms is achieved, suggesting an average optical power sensitivity of -14.6 dBm with a 0.5 A/W PD.Keywords
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