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Low Power Digital Clock Design Using LVCMOS Input/Output Standards on 45nm FPGA

Sujeet Pandey, Rishabh Mehta, Kartik Kalia, Anirudh Khanna, DM Akbar Hussain, Gaurav Verma
Gyancity Journal of Engineering and Technology , Volume 2, pp 23-28; doi:10.21058/gjet.2016.2204

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